Acceptable handling of transducer signals with large signal amplitude presents significant challenges to inputs of integrated amplification circuits, in particular for amplification circuits handling signals from a capacitive electret or condenser transducer element. A miniature ECM may comprise such a miniature capacitive electret or condenser transducer element to perform sound pick-up or recording in portable devices like mobile terminals, hearing instruments, headsets, sound recording cameras etc.
The large signal amplitude supplied by the transducer must be handled in a substantially linear manner by an input stage of a preamplifier up till a desired maximum amplitude. Above the desired maximum amplitude, the transducer signal must be limited to avoid irreversible damage to input devices of the preamplifier and/or other active or passive circuit components coupled to the input of the integrated amplification circuit. A known method of limiting the maximum amplitude of the input signal has been to place an input signal limiting network comprising a pair of anti-parallel diodes between the input of the preamplifier and ground, or any other suitable electric potential between the supply voltage and ground, such that input signal amplitudes exceeding about +/−one diode drop, typically +/−0.5-0.6 V, were limited to the latter peak level. However, this maximum amplitude level lies far below a maximum undistorted amplitude level delivered by contemporary miniature ECMs and other types of capacitive microphones. The low maximum amplitude handling capability of the input signal limiting network leads to premature distortion and audio signal clipping when utilized for microphone preamplifiers for capacitive microphones such as miniature ECMs. The premature distortion and audio signal clipping mean that an upper portion of a dynamic range of the capacitive microphones, e.g. sound pressure levels above 110, 120 or 130 dB SPL etc. depending on microphone sensitivity, is rendered useless.
It would accordingly be highly desirable to provide an input signal limiting network capable of handling maximum amplitudes well above the above-mentioned peak-peak level of about +/−0.5-0.6 V. The input signal limiting network should preferably be implementable in existing integrated semiconductor processes such as sub-micron CMOS and occupy a small semiconductor die area to keep costs low.
One possible methodology to increase the maximum input signal capability at the input of the preamplifier would be placing more than one diode, or other non-linear components, in series in each leg of the input signal limiting network. However, this is not feasible in standard semiconductor processes because any diffusion diode manufactured in a well suffers from a parasitic diode coupled between the well and the semiconductor substrate. Since the semiconductor substrate is coupled to ground, the parasitic diode creates a parasitic current path from the anode or cathode to ground when forward biased and spoils the intended operation of the semiconductor diode of the input signal limiting network for large input signal amplitudes e.g. above the previously mentioned peak-peak level of about +/−0.5-0.6 V. This problem has, however, been circumvented in accordance with the present invention where a current blocking member is configured to break the parasitic current path from an anode or cathode of the semiconductor diode to the semiconductor substrate.
One embodiment of the invention is based on the provision of a diode topology or design that comprises a current blocking member which creates a second parasitic diode in addition to the first parasitic diode towards the semiconductor substrate. This second, additional, parasitic diode is coupled in series with the first parasitic diodes and arranged to conduct forward in opposite direction to the first parasitic diode hence blocking any flow of parasitic current to or from the semiconductor substrate. This semiconductor diode topology is preferably based on a semiconductor process which offers an additional well diffusion compared to standard semiconductor processes.
Another embodiment of the invention is based on the provision of a diode topology or design that comprises a first poly-silicon member of a first polarity and second poly-silicon member of a second polarity arranged in electrical contact on top of a thick oxide layer opposite to the semiconductor substrate. The thick oxide layer functions as a current blocking member insulating both the cathode and anode terminals of the diode topology from the semiconductor substrate and accordingly prevents the creation of any parasitic diode current path to ground.